Every hole in a PCB starts as a drilled circle and is then plated, and that is where the ordinary part of the story ends. A special process hole is one that cannot be produced by drilling and plating alone: it needs a second operation, a controlled depth, a shaped cavity or a filling step, and each of those operations has a tolerance that the finished drawing has to carry. This article separates the four connection holes from the eight special process holes, gives the typical dimensions and the controlling tolerance for each, and corrects six items that are commonly listed as holes and are not.
The Definition That Makes the List Useful
A hole that is drilled through the board and plated is a standard process hole: the drill sets the diameter, the plating sets the wall, and the tolerance is a drill tolerance. Everything else on this page needs something more — a second drilling operation from the other side, a milling cutter instead of a drill, a depth stop, a filling and planarisation step, or a shape that is not a circle. Those are what special process holes are, and the second operation is what makes them special: it is where the cost and the tolerance both come from.
Sorting them that way matters because the ordinary list of “types of holes” mixes two different questions. Whether a hole is through, blind or buried is a question about which layers it connects. Whether it is countersunk, back-drilled or press-fit is a question about what happens to the hole after it is drilled. A board can be any combination, and a drawing that only answers the first question cannot be built.
The Baseline: Four Connection Holes
Four types cover every interlayer connection, and their limits are geometric.
| Type | Connects | Typical size | Controlling limit |
|---|---|---|---|
| Through hole via | All layers, top to bottom | 0.2–0.5 mm drill | Aspect ratio: 8:1 for FR-4, 6:1 for PTFE, 10–12:1 only with special plating |
| Blind via | An outer layer to one inner layer | Depth ≤ diameter | Sequential lamination; depth-to-diameter of 1:1 |
| Buried via | Two inner layers | 0.2–0.3 mm | Must be drilled before the outer layers are pressed |
| Microvia | Laser-drilled, one layer deep | ≤0.15 mm | Aspect ratio ≤1:1, preferably 0.75:1 |
Two definitions are worth pinning down because they are the source of most confusion. A microvia is defined by its aspect ratio as much as its diameter: a 0.1 mm mechanically drilled hole through 1.6 mm of laminate is not a microvia, it is a 16:1 through hole that cannot be plated. And the finished diameter is not the drill diameter: 20–25 µm of plating on the wall reduces a 0.30 mm drill to a 0.25 mm finished hole. The baseline behaviour of these four is covered in PCB through hole and hole size in high-frequency PCB processing.
The Typology: Eight Special Process Holes
Eight types, each with the operation that makes it special and the tolerance that operation controls.
| Type | What makes it special | Typical dimensions | Controlling tolerance | Typical use |
|---|---|---|---|---|
| Back-drilled via | A second drill removes the unused stub from the far side | Drill 0.2 mm larger than the via; residual stub 0.2–0.3 mm | Depth ±0.1 mm | Through vias carrying >10 GHz signals |
| Controlled-depth hole | Drilled to a stop rather than through | Depth 0.5–3 mm | Depth ±0.05 mm | Blind cavities, press-fit seats, thermal pockets |
| Counterbore | Flat-bottomed enlargement, milled with an end mill | Diameter 2–8 mm, depth 0.5–2 mm | Depth ±0.05 mm, concentricity ≤0.05 mm | Socket-head screws, recessed nuts |
| Countersink | Conical enlargement, cut with a form tool | 82°, 90° or 100° included angle | Depth to suit the screw head, ±0.05 mm | Flush flat-head screws |
| Thermal via | Drilled and plated for heat, often filled and capped | 0.2–0.5 mm, arrays at 0.8–1.2 mm pitch | Void <2 %, dimple ≤25 µm when capped | Under QFN pads, LED arrays, PA dies |
| Press-fit hole | No solder; the pin deforms the plated wall | 0.6–1.0 mm finished | Finished diameter ±0.025 mm | Backplanes, connectors, high-reliability joints |
| Castellated hole | Drilled, plated, then cut in half at the board edge | 0.6–1.0 mm, half exposed | Plating ≥25 µm on the exposed half | Module-to-motherboard soldering (stamp holes) |
| Tooling / datum hole | Position is the function; usually unplated | 2.0–3.2 mm | Position ±0.025 mm | Registration datum for every layer and for assembly |
Two more geometries are often added to the list. A slot or an elongated hole is milled rather than drilled, with a minimum width set by the router bit — about 0.8 mm, and 1.6 mm for anything deeper than a few millimetres. A stepped hole is a counterbore with a second, smaller counterbore inside it, and it exists mainly in metal-backed boards where a device has to sit down against the aluminium while the screw head sits lower still.
Back-Drilling: The Only Hole Whose Purpose Is to Remove Copper
A through via that connects layers 1 and 4 also passes layers 2 and 3, and the portion below the last connected layer is a stub. At low frequency the stub is a small capacitance. At high frequency it is a quarter-wave resonator, and at its resonant frequency it turns the via into a notch filter.
| Residual stub | First resonance (FR-4, εr 4) | Where that matters |
|---|---|---|
| 1.6 mm (no back-drill) | About 23 GHz | 77 GHz radar already sees the harmonic; 28 GHz links are marginal |
| 1.2 mm | About 31 GHz | Back-drilling needed above 10 GHz for margin |
| 0.8 mm | About 47 GHz | Adequate to 40 GHz |
| 0.5 mm | About 75 GHz | Adequate to 67 GHz |
| 0.3 mm | About 125 GHz | Beyond the reach of most laminate designs |
The operation itself is a drill 0.2 mm larger than the finished via, plunged from the opposite side to a depth that leaves 0.2–0.3 mm of stub. The controlling tolerance is depth, not diameter: ±0.1 mm is typical, and it has to be measured on a coupon or by X-ray because the result is inside the board. Back-drilling also removes the via’s capture pad on that side, which is why it is done after plating and before solder mask, and why the drill depth has to be planned against the stack rather than against the nominal board thickness.
Three Kinds of Depth, and What the Original Version Got Wrong
Counterbore, countersink and controlled-depth hole are three different operations that are regularly conflated. The distinction is in the shape of the cut and in the tool.
| Feature | Shape | Tool | Function |
|---|---|---|---|
| Counterbore | Flat-bottomed cylinder, walls parallel | End mill, plunged | A screw head or a nut sits on a flat seat |
| Countersink | Cone, included angle 82°/90°/100° | Form tool or countersink bit | A flat-head screw finishes flush with the surface |
| Controlled-depth hole | Cylinder of a set depth, smaller than the board | Drill with a depth stop, or router | A cavity or a seat that must not break through |
The point that is most often written backwards: the “trumpet-shaped hole that widens towards the surface” is a countersink, not a counterbore. A counterbore has parallel walls and a flat bottom, which is why it needs a milling cutter — a drill cannot produce a flat bottom. The sequence for either is the same and is not optional: drill the through hole first, then cut the enlargement, then check concentricity, because a counterbore that is off-centre by 0.1 mm puts the screw head off-centre by the same amount and the clamp load with it.
Depth tolerance on a counterbore is normally ±0.05 mm and it is measured from the surface the screw seats on. On a board with 0.05 mm of copper thickness variation and 0.1 mm of laminate tolerance, that is not a generous window: it is one of the reasons counterbores are usually specified on a metal-backed or thick board rather than on a thin laminate, where the local thickness varies more than the tolerance.
Thermal Vias: The Resistance Is in the Wall, Not the Pad
A thermal via is a hole whose purpose is conduction rather than connection, and its thermal resistance is set by the copper cross-section in the wall. That is a small number, which is why thermal via arrays are specified in tens rather than in ones.
| Construction (1.6 mm board) | Copper cross-section | Thermal resistance per via | A 5×5 array |
|---|---|---|---|
| 0.3 mm drill, 25 µm plating | 0.022 mm² | About 185 K/W | About 7.4 K/W |
| 0.3 mm, filled with copper | 0.071 mm² | About 57 K/W | About 2.3 K/W |
| Same area of FR-4, no vias | — | — | About 2,900 K/W |
The third row is the comparison that decides the design: a via array is two to three orders of magnitude better than the laminate it passes through, and filling the vias roughly triples the improvement again. Capped and filled is the version used under a QFN or an LED pad, where the acceptance criteria are void content below 2 % and dimple below 25 µm, because a void under a thermal pad is a hot spot and a dimple is a solder void.
What is often missed: a thermal via array has to be connected to something. A 5×5 array that lands on an internal plane which is thermally isolated is a 7.4 K/W path to nowhere. The pair to the structure is in HDI PCB performance, where the same array is treated from the density side.
Press-Fit and Castellation: Two Holes That Are Really Interfaces
A press-fit hole is a mechanical joint that happens to be plated. An eye-of-needle pin is pressed into a hole whose finished diameter is smaller than the pin’s compliant section, and the resulting deformation creates a gas-tight connection with no solder. The consequence for the fabricator is that the finished diameter is the specification, not the drill: ±0.025 mm on the finished hole, which after 25 µm of plating means the drill has to be held to about ±0.03 mm and the plating thickness has to be uniform across the panel.
Plating thickness for press-fit is usually 25–50 µm, and the reason is mechanical rather than electrical: a thin wall deforms with the pin instead of resisting it, and the joint loses its normal force after a few insertion cycles. Hole-wall roughness matters too, since a rough wall is a stress riser where the plating cracks.
A castellated hole is a plated hole cut in half at the board edge, so the finished feature is a half-cylinder of copper on the edge of a module. It is drilled and plated as a full hole with its centre on the rout line, and then the edge is routed away. The plating on the exposed half has to be at least 25 µm because it is now the solderable surface, and the hole has to be placed so that the remaining half is a half rather than a third — a castellation that is 30 % exposed is a cold joint waiting to happen.
Tooling Holes and Slots: Position Is the Function
A tooling hole is unplated, usually 2–3.2 mm, and its entire value is position: ±0.025 mm, referenced to the same datum as every layer. Every subsequent registration step — inner-layer exposure, lamination pinning, drilling, routing, electrical test — locates from those holes, so an error there is an error in every layer at once and is unrecoverable.
Slots and elongated holes are milled, not drilled, and the minimum width is the cutter diameter: about 0.8 mm for a shallow slot, 1.6 mm where the cut is deeper than a few millimetres because a slender cutter deflects. A slot that is narrower than the cutter in the drawing will come back as either a wider slot or a broken tool, and neither is a defect the fabricator can fix without a new drawing.
Two rules make all of this easier to build. Put the datum holes in the panel border rather than inside the part whenever the design allows, and give the fabricator a drawing that separates the hole table by operation: drilled through, drilled to depth, milled, then plated or not plated. Which is what the next section is about.
Six Items That Are Not Holes
The most common defect in an article about special process holes is that half the list is not a hole. Six that regularly appear:
| Item | What it actually is |
|---|---|
| Gold finger | A row of gold-plated edge contacts. There is no hole; it is a selective plating area on the board edge, and its specification is plating thickness and wear cycles, not diameter |
| ENIG / ENEPIG | Surface finishes applied to pads and holes. They are not hole types; the same hole can have either |
| Impedance-controlled hole | Not a hole type. It is a via designed for a target impedance, achieved through the antipad diameter, the annular ring and the number of reference planes it crosses |
| Non-circular hole | A slot, an ellipse or a rectangle — genuinely a hole, but produced by routing or punching, so it belongs with the milled features rather than with the drill table |
| Solder-mask opening | An aperture in a polymer layer. Nothing is removed from the board |
| Fiducial | A copper dot with a mask opening, used for optical alignment. If it is a hole it is a tooling hole with a different name |
Including the first three in a hole list is not a cosmetic error: it makes the drawing ambiguous. A fabricator reading “gold finger” in a hole table looks for a hole, and the RFQ comes back with a question instead of a price.
How to Put All of This on One Drawing
Ten items, in the order a CAM engineer will read them: 1. Datum definition and tooling hole position with ±0.025 mm. 2. Drilled-through table, with finished diameter and tolerance, and plating thickness. 3. Drill-to-depth table, with depth measured from which face and to what tolerance. 4. Back-drill table, with the layer to stop at and the residual stub allowed. 5. Counterbore table, with diameter, depth and concentricity requirement. 6. Countersink table, with included angle and the screw size it is cut for. 7. Milled features, with minimum width and corner radius. 8. Which holes are plated and which are not. 9. Press-fit holes called out separately, with the finished diameter tolerance and the plating thickness. 10. Castellations marked on the rout drawing, not on the drill drawing.
That list is longer than most drawings, and every line on it exists because the information is unrecoverable after the fact. A depth that is not specified cannot be measured after the hole is drilled; a plating thickness that is not specified is whatever the panel average happened to be.
Acceptance: What Is Actually Checked
Acceptance follows IPC-6012 for rigid boards, with the hole wall judged on roughness, plating thickness, and the absence of voids at the knee. A 25 µm minimum wall is the usual Class 2 requirement, 25 µm average with 20 µm minimum for Class 3, and the measurement is by cross-section on a coupon rather than on the board.
For the special operations the checks are different and mostly dimensional. Counterbores and countersinks are checked for depth and concentricity on a sample, back-drills by X-ray or cross-section, press-fit holes by pin gauge or a functional insertion test, and castellations optically for plating coverage on the exposed half. None of them is visible on the finished board in the way a solder defect is, which is why they are specified with a tolerance and verified on a coupon. The drilling parameters behind them are in drilling for high-frequency PCBs, and the plating side in plating for high-frequency PCBs.
Conclusion
Special process holes are the ones that need a second operation: back-drilling to remove a stub, a depth stop, an end mill for a flat bottom, a form tool for a cone, a filling step for a thermal via, a compliant pin for a press-fit joint, a rout cut for a castellation, or a tolerance on position for a datum. Eight types, each controlled by one number — depth ±0.1 mm for back-drilling, ±0.05 mm for a counterbore, ±0.025 mm for a press-fit hole and for a tooling hole.
And six items that are not holes at all. A gold finger is a plating area, ENIG is a finish, an impedance-controlled hole is a via with a designed antipad, a mask opening removes nothing, a fiducial is a dot, and a slot belongs on the rout drawing. Getting that list right is what turns a hole table into something a fabricator can quote from.
XCE PCB drills from 0.2 mm with aspect ratios to 8:1 on FR-4 and 6:1 on PTFE, back-drills to a 0.25 mm residual stub, counterbores and press-fit holes to ±0.025 mm where the drawing asks for it, and builds 2 to 72 layers on 600×1200 mm panels with samples in as fast as 24 hours, inspected to IPC-A-600G and IPC-6015. Send the hole table and we will come back with the process route per operation — request a quote or WhatsApp +86 180 3818 8537. The four connection holes and their behaviour on a high-frequency board are covered separately in different holes in high-frequency PCBs.
Frequently Asked Questions
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Back-Drilling, Counterbores and Press-Fit Holes
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