What Is an RF PCB? Frequency Boundaries, Loss Budgets and Material Lines

An RF PCB is any board whose traces are part of a transmission line rather than a node of a circuit — and that definition does not name a frequency. The same 100 mm trace is electrically short at 100 MHz and five and a half wavelengths long at 10 GHz, so the material, the stack and the fabrication tolerances that make one board “RF” would be wasted on the other. This article replaces the usual list of features with the three thresholds that actually decide it — electrical length, loss budget and impedance tolerance — and maps them to numbers on real laminates from 0.9 GHz to 77 GHz.

An RF PCB is a board on which the copper is treated as a transmission line: impedance is specified, the return current is designed rather than assumed, and the laminate is chosen for its dielectric behaviour instead of its mechanical grade. Everything else — the special materials, the tight etch control, the coupons — follows from that, and the point at which it becomes necessary is set by three thresholds that arrive at different frequencies.

The thresholds are independent, and this is why arguments about “what frequency makes a board RF” never resolve. A 433 MHz key fob transmitter has a 30 mm antenna trace that is 0.04 λ long and 0.2 dB of loss: no threshold is crossed, and FR-4 is the correct engineering answer. A 77 GHz radar module has a 4 mm feed that is 0.5 λ long and 1.3 dB of loss: all three are crossed on a board smaller than a postage stamp. The material follows the thresholds, not the frequency.

The performance side of this — what an RF board is asked to do once it is one — is covered in the performance and functions of RF PCBs. This article is about the definition and the arithmetic behind it.

Most of the confusion in this corner of the industry comes from four terms being used as if they were interchangeable. They are not: two describe a spectrum, one describes a material class, and one describes a wavelength regime.

Two practical consequences follow. First, “high-frequency material” is a procurement category with a Dk tolerance on the certificate, and it can be, and often is, used at frequencies where no RF behaviour exists — because the board has to survive an environment, or because a customer specified it. Second, a board can be RF without any special laminate, and frequently is: a 2.4 GHz antenna in a toy is etched on FR-4 with a ±20 % impedance window and works, because the loss budget is 0.4 dB and the antenna is tuned after etching.

The guide wavelength on a microstrip is λg = 300 / (f_GHz × √ε_eff) millimetres. For a 50 Ω line the effective permittivity sits between the substrate Dk and 1, and for the laminates in this article it works out as 1.87 on Dk 2.20, 2.67 on Dk 3.38, 2.85 on Dk 3.66 and roughly 3.3 on FR-4.

The right-hand column is the useful one. At 10 GHz, any trace longer than 1.8 mm is already a distributed element on Dk 3.38, which on a real board means every trace except the pad-to-pad connections. At 77 GHz the same statement holds at 0.24 mm, which is shorter than most component footprints — that is the real reason millimetre-wave boards are a different discipline, and it is a geometric fact rather than a property of the laminate.

What follows from crossing the threshold is that length stops being free. On a lumped board, a trace of 5 mm and a trace of 15 mm do the same thing. On an RF board they are 0.27 λ and 0.82 λ at 10 GHz, so the longer one rotates the phase by 97° more and radiates from its discontinuities. The physics of why the return current must follow the signal, and what happens when it cannot, is in the concepts of electricity in PCB.

Dielectric loss per unit length follows a compact formula that is worth memorising, because it lets you price a laminate before you ask for a quote: α_d ≈ 2.6 × f_GHz × √Dk × Df dB/inch. Note what is in it and what is not: frequency and Df enter linearly, Dk only as a square root, and thickness does not appear at all — because this is loss per inch of a homogeneous dielectric, not per inch of a real microstrip.

The RO3010 row is the one that surprises people: a Dk of 10.2 with a good Df still loses more per inch than RO4003C, because the square root of 10.2 is 3.2 and the Df is not three times better. High Dk buys area, not loss — a 50 Ω line at 10 GHz is 0.85 λ per inch on RO3010 against 2.7 λ per inch on 5880, so a given electrical length occupies a third of the board. It also has to be said the other way round: because the line is shorter for the same electrical length, the total loss over a fixed phase shift is set by Df alone, and RO3010 is 0.19/0.035 = 5.4 times lossier than 5880 for the same phase.

Put the budget on the drawing and the material decision becomes arithmetic. A 300 mm feed at 10 GHz costs 15.1 dB on FR-4, 4.5 dB on 4350B, 3.8 dB on 4003C and 2.6 dB on 5880. If the radio has 6 dB of margin, FR-4 is not a compromise, it is a failure — and that, not the frequency, is why the board became an RF board.

Total insertion loss on a microstrip has four terms: dielectric, conductor, radiation and connector. Articles usually quote only the first two, and then compare laminates as if the other two did not exist.

Conductor loss scales with √f and with surface roughness, and at 10 GHz it lives in the outer 0.65 µm of copper. That is why copper foil grade and surface finish matter more on low-loss laminates than on FR-4: on FR-4 the dielectric term is 85 % of the total and hides everything else; on 5880 the dielectric term is 0.035 dB/in against a total of 0.22 dB/in, so the copper, the finish and the roughness are 84 % of the loss and the laminate is nearly irrelevant to it.

Two numbers make the finish point concrete. At 10 GHz the skin depth is 0.65 µm in copper, 1.33 µm in nickel and 0.78 µm in gold. An ENIG finish is 3–6 µm of nickel under 0.05–0.10 µm of gold, so the current travels in nickel with 2.04 times the surface resistance of copper, while the gold layer is thinner than its own skin depth by a factor of eight and carries almost nothing. On a 4350B board at 10 GHz that is tolerable; at 28 GHz it is not, and the finish becomes a design decision rather than a purchasing one. The full comparison is in the surface treatment processes in PCB manufacturing.

Every RF design eventually arrives at the same place: the characteristic impedance has to be 50 Ω within a window, and the window is set by the return loss the system can survive. A ±10 % impedance deviation produces about −20 dB return loss at a single interface; ±5 % gives about −26 dB. What most specifications do not say is that the window is consumed by five independent contributors, of which the trace width is only one.

Combined as independent errors the budget is about ±6.6 %, which fits a ±10 % window and does not fit ±5 % without help. The help is arithmetic rather than heroics: choose a dielectric thick enough that the etch term stops mattering (at 0.508 mm a 50 Ω line is 1.18 mm wide, so ±25 µm is only 2 %), specify Dk with a tolerance you can certify, and measure the result on a coupon from the same panel. The width-to-thickness relationship that makes this work is set out in the performance and role of route width, and the measurement side in impedance control in high-frequency PCB manufacturing.

The material families divide by construction, not by frequency: PTFE with microglass or ceramic filler, hydrocarbon with ceramic filler on FR-4 processes, and ceramic-filled PTFE with no glass at all. The frequency mapping is a consequence of Df and of how tightly the laminate can be made.

Two mapping rules are worth keeping. First, the Df threshold, not the frequency, picks the family: if the budget allows 0.3 dB/in at 10 GHz, RO4003C at 0.32 dB/in is already at the limit and moving to 24 GHz with the same budget forces PTFE; if it allows 1 dB/in, FR-4 survives to about 3 GHz. Second, above 24 GHz the tolerance of the laminate starts to matter as much as its loss — a Dk tolerance of ±0.30 on RO3010 is ±3.4 % impedance before any etching is done. The transition from standard boards and what it costs is set out in the differences between high-frequency and standard PCBs, and the PTFE end of the range in RT/duroid 5880.

The table below is the practical summary: for each band, the board that is normally used, and the constraint that decides the design.

The loss column uses RO4003C at 10 GHz and 4003C/5880 figures elsewhere, from the 50 Ω microstrip loss tables; the last two rows are the point at which a millimetre-wave board stops being a smaller version of a 10 GHz board and becomes a mechanical tolerance problem with an electrical output.

An RF board usually fails on something the schematic does not show. The commonest is a via that is fine at DC and a quarter-wave resonator at the operating frequency: a plated through hole through a 1.6 mm board is a stub of roughly 1.6 mm, which resonates near 23 GHz on an FR-4 stack and 32–33 GHz on PTFE, because the higher effective permittivity of the surrounding dielectric slows the wave more. At 10 GHz that same stub is electrically short enough to ignore; at 28 GHz it is a notch in the middle of the band.

The second common failure is a reference plane that is continuous but not adjacent: the return current takes the path of least impedance, and at 10 GHz that path is directly under the trace, within about three dielectric thicknesses. A plane two layers away, or split by a connector cutout, turns the launch into a radiator. The stack-up rules that keep it adjacent are in high-frequency PCB stack-up design, and the hole side in drilling in high-frequency PCB manufacturing.

The material decision changes five process steps, and each has a window that differs from FR-4 practice. This is where a “we can make RF boards” claim is either true or not.

None of these is exotic, but all of them are declarable: a fabricator that cannot state its lamination cycle for PTFE, or its desmear chemistry, is not making RF boards — it is making FR-4 boards out of expensive material and hoping. The process map, step by step, is in the high-frequency PCB manufacturing process.

The original version of this article, like most of the genre, was a list of virtues. Five of them are worth correcting, because each leads to a design or purchasing decision that costs money.

The pattern is that a board can only control what happens in its own copper and dielectric: impedance, loss, and the integrity of the return path. Everything else attributed to “RF PCB design” — shielding effectiveness, thermal spreading, antenna gain — is delivered by parts that are not the board.

Seven items turn “an RF board” into something a fabricator can quote and a customer can inspect:

1. The stack, layer by layer, with the laminate type, the core thickness and the bondply, because the dielectric height sets the impedance and the laminate sets the loss. 2. The impedance target per layer with its tolerance, plus the coupon geometry and the layer the coupon is measured on. 3. The Dk basis — process or design value — since the two differ by about 0.15 on RO4000, which is 2 % of width. 4. Copper weight and foil type per layer, including whether HVLP is required above 10 GHz. 5. The surface finish with its thickness window, and whether nickel is permitted. 6. The via policy: which vias are back-drilled, to what depth, and the stub tolerance. 7. The acceptance test: coupon TDR, S21 over the band, cross-section per panel, ionic cleanliness.

With those seven, a dispute becomes a measurement. Without them, it becomes a conversation about what “RF grade” was supposed to mean.

Acceptance on an RF board is four measurements, and each one answers a different question.

Impedance from a coupon on the same panel, measured by TDR or VNA, per layer — it answers whether the stack was built as designed. Insertion loss from a 50 Ω line coupon over the operating band, compared with the calculated value, which answers whether the laminate is what was ordered. Cross-section per panel, which answers whether the holes are plated to the specified thickness and whether the dielectric is the specified height. Ionic cleanliness, which answers whether the board will drift in the field. A fifth measurement, thermal cycling with Z-axis strain monitoring, is what separates a board that passes today from one that survives a hundred reflows in service.

Two of those four — loss and impedance — are the ones that cannot be corrected downstream. A wrong stack discovered at assembly is a scrap event, which is why the coupon exists.

An RF PCB is a board where the copper is a transmission line, and the thresholds that make it one are electrical length (length > λg/10, which is 1.8 mm at 10 GHz on Dk 3.38 and 0.24 mm at 77 GHz), loss budget (0.1 dB per 100 mm being the point at which the laminate stops being commodity), and impedance tolerance (a ±5 % window, of which thickness alone consumes ±6 % if it is allowed to). None of the three names a frequency, which is why “RF” and “high frequency” get used interchangeably and then mislead.

The material follows from the thresholds. Below about 3 GHz and 1 dB/in, FR-4 is the engineering answer and saying otherwise is expensive. Between 3 and 24 GHz the RO4000 family is the workhorse, with RO3003 where Df matters. Above 24 GHz the loss is dominated by copper, the finish and the tolerances, and the laminate choice is a question of Dk stability and phase consistency rather than of Df alone.

XCE PCB builds to those windows: 2 to 72 layers, panels to 600×1200 mm, impedance ±10 %, samples in as fast as 24 hours, 5,000 m² of plant with 80+ engineers, inspected to IPC-A-600G and IPC-6015. Mixed stacks and PTFE laminates are processed on their own lamination cycles, because a single cycle cannot serve three cure systems. Send the stack and the band, and the material recommendation comes back with the loss budget attached.